Abstract | ||
---|---|---|
This paper proposes a low-cost fault-tolerant Carry Look-Ahead (CLA) adder which consumes much less power and area overheads in comparison with other fault-tolerant CLA adders. Analytical and experimental results show that this adder corrects all single-bit and multiple-bit transient faults. The Power-Delay Product (PDP) and area overheads of this technique are decreased at least 82% and 71%, respectively, as compared to adders which use traditional TMR, parity prediction, and duplication techniques. |
Year | DOI | Venue |
---|---|---|
2009 | 10.1109/IOLTS.2009.5196019 | 2009 15TH IEEE INTERNATIONAL ON-LINE TESTING SYMPOSIUM |
Keywords | Field | DocType |
Carry Look-Ahead Adder, Fault Tolerance, Single-Event Transient | Power–delay product,Adder,Computer science,Fault detection and isolation,Parallel computing,Triple modular redundancy,Real-time computing,Electronic engineering,Carry-save adder,Redundancy (engineering),Fault tolerance,Serial binary adder | Conference |
ISSN | Citations | PageRank |
1942-9398 | 3 | 0.39 |
References | Authors | |
7 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Alireza Namazi | 1 | 16 | 3.36 |
Yasser Sedaghat | 2 | 36 | 6.69 |
Seyed Ghassem Miremadi | 3 | 531 | 50.32 |
Alireza Ejlali | 4 | 433 | 38.60 |