| can erasure codes damage reliability in SSD-based Storage Systems? | 0 | 0.34 | 2019 |
| TA-LRW: A Replacement Policy for Error Rate Reduction in STT-MRAM Caches | 4 | 0.40 | 2019 |
| 3DCAM: A Low Overhead Crosstalk Avoidance Mechanism for TSV-Based 3D ICs. | 0 | 0.34 | 2019 |
| Aware: Adaptive Way Allocation For Reconfigurable Eccs To Protect Write Errors In Stt-Ram Caches | 2 | 0.37 | 2019 |
| Hybrid RAID: A Solution for Enhancing the Reliability of SSD-Based RAIDs. | 0 | 0.34 | 2017 |
| 3D-DPS: An Efficient 3D-CAC for Reliable Data Transfer in 3D ICs | 0 | 0.34 | 2016 |
| Investigating the Effects of Process Variations and System Workloads on Reliability of STT-RAM Caches | 1 | 0.36 | 2016 |
| On designing an efficient numerical-based forbidden pattern free crosstalk avoidance codec for reliable data transfer of NoCs. | 4 | 0.41 | 2016 |
| On designing endurance aware erasure code for SSD-based storage systems. | 2 | 0.38 | 2016 |
| Floating-ECC: Dynamic Repositioning of Error Correcting Code Bits for Extending the Lifetime of STT-RAM Caches. | 7 | 0.47 | 2016 |
| A Cache-Assisted Scratchpad Memory for Multiple-Bit-Error Correction. | 0 | 0.34 | 2016 |
| ARMOR: Adaptive Reliability Management by On-the-Fly Redundancy in Multicore Embedded Processors | 1 | 0.38 | 2015 |
| Pam: A Packet Manipulation Mechanism For Mitigating Crosstalk Faults In Nocs | 0 | 0.34 | 2015 |
| In-Scratchpad Memory Replication: Protecting Scratchpad Memories in Multicore Embedded Systems against Soft Errors | 2 | 0.36 | 2015 |
| LATED: Lifetime-Aware Tag for Enduring Design | 2 | 0.36 | 2015 |
| A fault-tolerant and energy-aware mechanism for cluster-based routing algorithm of WSNs | 2 | 0.38 | 2015 |
| On endurance and performance of erasure codes in SSD-based storage systems | 3 | 0.40 | 2015 |
| Addressing NoC Reliability Through an Efficient Fibonacci-Based Crosstalk Avoidance Codec Design. | 1 | 0.35 | 2015 |
| A fast, flexible, and easy-to-develop FPGA-based fault injection technique. | 21 | 0.90 | 2014 |
| Developing Inherently Resilient Software Against Soft-Errors Based on Algorithm Level Inherent Features | 4 | 0.41 | 2014 |
| Soft error estimation and mitigation of digital circuits by characterizing input patterns of logic gates. | 2 | 0.41 | 2014 |
| PSP-cache: a low-cost fault-tolerant cache memory architecture | 2 | 0.36 | 2014 |
| FTSPM: A Fault-Tolerant ScratchPad Memory | 7 | 0.46 | 2013 |
| A Non-Intrusive Portable Fault Injection Framework To Assess Reliability Of Fpga-Based Designs | 0 | 0.34 | 2013 |
| Efficient algorithms to accurately compute derating factors of digital circuits. | 13 | 0.84 | 2012 |
| Using Genetic Algorithm to Identify Soft-Error Derating Blocks of an Application Program | 2 | 0.37 | 2012 |
| Memory Mapped SPM: Protecting Instruction Scratchpad Memory in Embedded Systems against Soft Errors | 5 | 0.44 | 2012 |
| Low Cost Concurrent Error Detection for On-Chip Memory Based Embedded Processors | 0 | 0.34 | 2011 |
| An FSM-based monitoring technique to differentiate between follow-up and original errors in safety-critical distributed embedded systems | 0 | 0.34 | 2011 |
| Operand Width Aware Hardware Reuse: A low cost fault-tolerant approach to ALU design in embedded processors. | 4 | 0.45 | 2011 |
| ScTMR: A scan chain-based error recovery technique for TMR systems in safety-critical applications. | 6 | 0.60 | 2011 |
| A reliable and power efficient flow-control method to eliminate crosstalk faults in network-on-chips | 2 | 0.37 | 2011 |
| Numeral-Based Crosstalk Avoidance Coding to Reliable NoC Design | 5 | 0.44 | 2011 |
| Soft error rate estimation of digital circuits in the presence of Multiple Event Transients (METs) | 25 | 0.95 | 2011 |
| A Low Cost circuit level fault detection technique to Full Adder design. | 2 | 0.37 | 2011 |
| Fault injection in mixed-signal environment using behavioral fault modeling in Verilog-A. | 0 | 0.34 | 2010 |
| An Efficient Method to Reliable Data Transmission in Network-on-Chips | 1 | 0.35 | 2010 |
| Classification of Activated Faults in the FlexRay-Based Networks | 2 | 0.45 | 2010 |
| A Fast And Accurate Multi-Cycle Soft Error Rate Estimation Approach To Resilient Embedded Systems Design | 7 | 0.74 | 2010 |
| Complement routing: A methodology to design reliable routing algorithm for Network on Chips | 4 | 0.40 | 2010 |
| Performability/energy tradeoff in error-control schemes for on-chip networks | 26 | 1.12 | 2010 |
| A low-overhead and reliable switch architecture for Network-on-Chips | 7 | 0.43 | 2010 |
| A Fast Analytical Approach to Multi-cycle Soft Error Rate Estimation of Sequential Circuits | 3 | 0.39 | 2010 |
| A Low-Cost Fault-Tolerant Technique For Carry Look-Ahead Adder | 3 | 0.39 | 2009 |
| Fault Tolerant and Low Energy Write-Back Heterogeneous Set Associative Cache for DSM Technologies | 0 | 0.34 | 2009 |
| Joint write policy and fault-tolerance mechanism selection for caches in DSM technologies: Energy-reliability trade-off | 1 | 0.35 | 2009 |
| XYX: A Power & Performance Efficient Fault-Tolerant Routing Algorithm for Network on Chip | 10 | 0.71 | 2009 |
| A Low-Cost On-Line Monitoring Mechanism for the FlexRay Communication Protocol | 2 | 0.44 | 2009 |
| Categorizing and Analysis of Activated Faults in the FlexRay Communication Controller Registers | 5 | 0.43 | 2009 |
| FPGA-Based Fault Injection into Synthesizable Verilog HDL Models | 13 | 0.85 | 2008 |
