Name
Abstract | ||
|---|---|---|
Minimizing power consumption during functional operation and during manufacturing test has become one of the dominant requirements for the semiconductor designs in the past decade. From commercial DFT tool point of view, this paper describes the capabilities the DFT tools can provide to achieve comprehensive testing of low power designs as well as to reduce test power consumption during test application. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/IGCC.2011.6008609 | IGCC |
Keywords | Field | DocType |
low power testing,dominant requirement,minimizing power consumption,past decade,functional operation,dft tool,test power consumption,low power design,test application,comprehensive testing,commercial dft tool point,low power electronics,design for test,integrated circuit design,logic gates,switches,automatic test pattern generation | Design for testing,Automatic test pattern generation,Logic gate,Electronic engineering,Power demand,Integrated circuit design,Engineering,Test power,Power consumption,Low-power electronics | Conference |
Citations | PageRank | References |
0 | 0.34 | 31 |
Authors | ||
1 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Xijiang Lin | 1 | 687 | 42.03 |