Title
A Memory-Efficient Pattern Matching With Hardware-Based Bit-Split String Matchers For Deep Packet Inspection
Abstract
This paper proposes a hardware-based parallel pattern matching engine using a memory-based bit-split string matcher architecture. The proposed bit-split string matcher separates the transition table from the state table, so that state transitions towards the initial state are not stored. Therefore, total memory requirements can be minimized.
Year
DOI
Venue
2010
10.1587/transcom.E93.B.396
IEICE TRANSACTIONS ON COMMUNICATIONS
Keywords
Field
DocType
computer network security, deep packet inspection, finite state machine, pattern matching, network monitoring
State transition table,Deep packet inspection,Computer science,Network security,Algorithm,Finite-state machine,Storage management,Network monitoring,Computer hardware,Pattern matching
Journal
Volume
Issue
ISSN
E93B
2
0916-8516
Citations 
PageRank 
References 
1
0.40
4
Authors
5
Name
Order
Citations
PageRank
Hyunjin Kim1224.69
Hong-Sik Kim2839.69
Junghee Lee322627.26
Jinho Ahn48327.05
Sungho Kang543678.44