Name
Year | DOI | Venue |
|---|---|---|
1991 | 10.1109/TEST.1991.519512 | ITC |
Keywords | Field | DocType |
manufactured digital sequential circuits,statistical model,chip,combinational circuits,part per million,fault detection,combinational circuit,sequential circuits,probability,manufacturing,sequential analysis,fault coverage | Stuck-at fault,Automatic test pattern generation,Sequential logic,Joint probability distribution,Fault coverage,Computer science,Fault detection and isolation,Real-time computing,Combinational logic,Electronic engineering,Statistical model | Conference |
ISSN | ISBN | Citations |
1089-3539 | 0-8186-9156-5 | 6 |
PageRank | References | Authors |
0.89 | 2 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Dharam Vir Das | 1 | 6 | 0.89 |
| Sharad C. Seth | 2 | 671 | 93.61 |
| Vishwani D. Agrawal | 3 | 3502 | 470.06 |