Abstract | ||
---|---|---|
A twin-transistor random access memory (TTRAM) can provide high speed, low power and high density with CMOS compatible SOI process. However it is difficult to handle as the unified memory required for advanced SoC because it needs the simple control sensing operation for memory compiler, higher cell efficiency, and lower voltage operation for dynamic frequency and voltage control. Enhanced TTRAM (... |
Year | DOI | Venue |
---|---|---|
2007 | 10.1109/JSSC.2007.891677 | IEEE Journal of Solid-State Circuits |
Keywords | Field | DocType |
Energy management,Power system management,Memory management,Random access memory,Voltage control,CMOS process,Frequency,Read-write memory,Low voltage,Dynamic voltage scaling | Dynamic random-access memory,Power management,Computer science,Voltage source,Electronic engineering,Automatic frequency control,Low voltage,Electrical engineering,Integrated circuit,Random access,Low-power electronics | Journal |
Volume | Issue | ISSN |
42 | 4 | 0018-9200 |
Citations | PageRank | References |
1 | 0.64 | 1 |
Authors | ||
8 |
Name | Order | Citations | PageRank |
---|---|---|---|
Fukashi Morishita | 1 | 9 | 3.84 |
Isamu Hayashi | 2 | 36 | 4.71 |
Takayuki Gyohten | 3 | 20 | 3.94 |
H. Noda | 4 | 104 | 25.62 |
Takashi Ipposhi | 5 | 13 | 5.97 |
Hiroki Shimano | 6 | 13 | 4.07 |
Katsumi Dosaka | 7 | 77 | 15.22 |
Kazutami Arimoto | 8 | 95 | 29.82 |