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TAKASHI IPPOSHI
Author Info
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Name
Affiliation
Papers
TAKASHI IPPOSHI
Renesas Technol Corp, Itami, Hyogo 6640005, Japan
11
Collaborators
Citations
PageRank
26
13
5.97
Referers
Referees
References
54
89
14
Publications (11 rows)
Collaborators (26 rows)
Referers (54 rows)
Referees (89 rows)
Title
Citations
PageRank
Year
A Look-Ahead Active Body-Biasing Scheme For Soi-Sram With Dynamic V-Ddm Control
0
0.34
2009
Delayed-Abc Soi For Crosstalk Noise Repair
1
0.48
2008
Low Power Sram With Boost Driver Generating Pulsed Word Line Voltage For Sub-1v Operation
6
0.86
2008
Ultra Low Voltage Operation with Bootstrap Scheme for Single Power Supply SOI-SRAM
0
0.34
2007
Charge Recycling In Mtcmos Circuits With Block Dividing
0
0.34
2007
Boosted Voltage Scheme With Active Body-Biasing Control On Pd-Soi For Ultra Low Voltage Operation
1
0.38
2007
A 0.05�?0.05mm2 RFID Chip with Easily Scaled-Down ID-Memory.
3
1.49
2007
A Configurable Enhanced TTRAM Macro for System-Level Power Management Unified Memory
1
0.64
2007
A Capacitorless Twin-Transistor Random Access Memory (TTRAM) on SOI
1
0.43
2007
Look-Ahead Dynamic Threshold Voltage Control Scheme for Improving Write Margin of SOI-7T-SRAM
0
0.34
2007
Dynamic Threshold Voltage Control For Dual Supply Voltage Scheme On Pd-Soi
0
0.34
2006
1