Name
Abstract | ||
|---|---|---|
Most of Block based motion estimation algorithms are based on computing the sum of absolute differences (SAD) between candidate and reference block. In this paper a FPGA design for fast computing of the minimum SAD is proposed. Thanks to the use of the on-line arithmetic (OLA) two goal are achieved: it is possible to implement a full 16 x 16 macroblock SAD in a single FPGA device and it permits us to speed up the computation by early truncation of the SAD calculation. Reconfigurable devices allows us to change 8 x 8 or 16 x 16 pixels per block models. Comparison with other related works are provided. |
Year | DOI | Venue |
|---|---|---|
2004 | 10.1007/978-3-540-30117-2_112 | Lecture Notes in Computer Science |
Keywords | DocType | Volume |
motion estimation | Conference | 3203 |
ISSN | Citations | PageRank |
0302-9743 | 8 | 1.26 |
References | Authors | |
6 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Joaquín Olivares | 1 | 21 | 6.42 |
| Javier Hormigo | 2 | 113 | 19.45 |
| Julio Villalba | 3 | 219 | 23.56 |
| Ignacio Benavides | 4 | 24 | 2.89 |