Abstract | ||
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Compact set of 3-valued test vectors for random pattern resistant faults are covered in multiple test passes. During a pass, its associated test cube specifies certain bits in the scan chain to be held fixed and others to change pseudo -randomly. We propose an algorithm to find a small number of cubes to cover all the test vectors, thus minimizing total test length. The test-cube finding algorithm repeatedly evaluates small perturbations of the current solution so as to maximize the expected test coverage of the cube. Experimental results show that our algorithm covers the test vectors by test cubes that are one to two orders of magnitude smaller in number with a much smaller increase in the percentage of specified bits. It outperforms comparable schemes reported in the literature |
Year | DOI | Venue |
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2005 | 10.1109/ATS.2005.55 | Asian Test Symposium |
Keywords | Field | DocType |
multiple test,3-valued test vector,test compaction,integrated circuit testing,test-data compression,small number,efficient test compaction,test vector,built-in testing.,built-in self test,scan chain,test-cube finding algorithm,total test length,random pattern resistant faults,test cube,built-in testing,pseudo-random testing,associated test cube,small perturbation,expected test coverage,test coverage,random testing,multiple testing | Code coverage,Small number,Computer science,Scan chain,Electronic engineering,Compact space,Test compression,Order of magnitude,Cube,Built-in self-test | Conference |
ISSN | ISBN | Citations |
1081-7735 | 0-7695-2481-8 | 7 |
PageRank | References | Authors |
0.47 | 20 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Sheng Zhang | 1 | 21 | 1.50 |
Sharad C. Seth | 2 | 671 | 93.61 |
Bhargab B. Bhattacharya | 3 | 848 | 118.02 |