Abstract | ||
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We present a configurable error correction scheme, combining a set of single-error correction (SEC) codes with interleaving, to achieve reliable and energy-efficient SoC links. Both the encoder and interleaver adapt to different noise conditions in order to address adjacent multi-wire errors. Using this approach, we achieve residual flit-error rate one order of magnitude less than with a simple SEC code. For a given reliability, the proposed approach achieves up to 15% power improvement over a fixed coding scheme. Furthermore, an XOR-tree-sharing method reduces codec area overhead by about 30%. |
Year | DOI | Venue |
---|---|---|
2008 | 10.1109/SOCC.2008.4641482 | SoCC |
Keywords | Field | DocType |
multiwire error,switch-to-switch soc link,configurable error correction,error correction codes,system-on-chip,fixed coding scheme,flit-error rate,single-error correction code scheme,xor-tree-sharing method,error correction,system on chip,energy efficient,error rate,noise,codecs,reliability,encoding,decoding | Residual,System on a chip,Computer science,Real-time computing,Error detection and correction,Electronic engineering,Encoder,Decoding methods,Codec,Interleaving,Encoding (memory) | Conference |
ISSN | ISBN | Citations |
2164-1676 | 978-1-4244-2597-6 | 1 |
PageRank | References | Authors |
0.36 | 10 | 2 |
Name | Order | Citations | PageRank |
---|---|---|---|
Qiaoyan Yu | 1 | 174 | 28.58 |
Paul Ampadu | 2 | 285 | 28.55 |