Title
Optimization of the bias current network for accurate on-chip thermal monitoring
Abstract
Microprocessor chips employ increasingly larger number of thermal sensing devices. These devices are networked by an underlying infrastructure, which provides bias currents to sensing devices and collects measurements. In this work, we address the optimization of the bias current distribution network utilized by the sensing devices. We show that the choice between two fundamental topologies (the 2-wire and the 4-wire measurement) for this network has a non-negligible impact on the precision of the monitoring system. We also show that the 4-wire measurement principle supports the remote sensing technique better. However, it requires more routing resources. We thus propose a novel routing algorithm to minimize its routing cost. We also present a detailed evaluation of the quality of the resulting system in presence of process and thermal variations. Our Monte Carlo simulations using the IBM 10SF 65 nm SPICE models show that the monitoring accuracies can be as high as 0.6??C under considerable amount of process and temperature variation. Moreover, by adopting a customized routing approach for the current mirror network, the total wire length of the bias current network can be reduced by as much as 42.74% and by 27.65% on average.
Year
DOI
Venue
2010
10.1109/DATE.2010.5457023
DATE
Keywords
Field
DocType
optimisation,remote sensing,spice,on-chip thermal monitoring,temperature sensors,temperature measurement,routing resource,thermal sensing devices,customized routing approach,microprocessor chips,routing resources,monte carlo simulations,size 65 nm,bias current network,bias current,accurate on-chip thermal monitoring,4-wire measurement principle,optimization,monitoring accuracy,bias current distribution network,monte carlo methods,current mirror network,4-wire measurement,routing cost,ibm 10sf spice models,distribution networks,chip,scheduling,high level synthesis,reconfigurable computing,network on a chip,routing,sensors,accuracy,monte carlo simulation,network topology,remote monitoring
Monte Carlo method,Current mirror,Computer science,High-level synthesis,Microprocessor,Network on a chip,Network topology,Real-time computing,Electronic engineering,Measuring principle,Biasing
Conference
ISSN
ISBN
Citations 
1530-1591
978-1-4244-7054-9
0
PageRank 
References 
Authors
0.34
15
2
Name
Order
Citations
PageRank
Jieyi Long11298.98
Seda Öǧrenci Memik248842.57