Name
Title | ||
|---|---|---|
Clocked CMOS adiabatic logic with integrated single-phase power-clock supply: experimental results |
Abstract | ||
|---|---|---|
In this paper we describe the design and experimental evaluation of a clocked CMOS adiabatic logic (CAL). CAL is a dual-rail logic that operates from a single-phase AC power-clock supply in the 'adiabatic' mode, or from a DC power supply in the 'non-adiabatic' mode. In the adiabatic mode, the power-clock supply waveform is generated using an on-chip switching transistor and a small external inductor between the chip and a low-voltage DC supply. Circuit operation and performance are evaluated using a chain of inverters realized in 1.2 /spl mu/m technology. Experimental results show energy savings in the adiabatic mode versus the non-adiabatic mode at clock frequencies up to about 40 MHz. |
Year | DOI | Venue |
|---|---|---|
1997 | 10.1145/263272.263365 | ISLPED |
Keywords | DocType | ISBN |
clocked cmos adiabatic logic,integrated single-phase power-clock supply,low voltage,chip,logic gates | Conference | 0-89791-903-3 |
Citations | PageRank | References |
8 | 2.36 | 2 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Dragan Maksimović | 1 | 69 | 12.50 |
| Vojin G. Oklobdzija | 2 | 806 | 137.25 |
| Bosko Nikolic | 3 | 583 | 90.17 |
| K. Wayne Current | 4 | 58 | 12.64 |
| Maksimovic, D. | 5 | 8 | 2.36 |