Title
Joint hardware-software leakage minimization approach for the register file of VLIW embedded architectures
Abstract
New applications demand very high processing power when run on embedded systems. Very Long Instruction Word (VLIW) architectures have emerged as a promising alternative to provide such processing capabilities under the given energy budget. However, in this new VLIW-based architectures, the register file is a very critical contributor to the overall power consumption and new approaches have to be proposed to reduce its power while preserving system performance. In this paper, we propose a novel joint hardware-software approach that reduces the leakage energy in the register files of these embedded VLIW architectures. This approach relies upon an energy-aware register assignment method and a hardware support that creates sub-banks in the global register file that can be switched on/off at run time. Our results indicate energy savings in the register file, after considering the overhead of the added extra hardware, up to 50% for modern multimedia embedded applications without performance degradation. We illustrate this approach using real-life applications running on these processors. We also illustrate the tradeoff between the area overhead vs. the gains in the leakage energy for the different strategies.
Year
DOI
Venue
2008
10.1016/j.vlsi.2007.04.004
Integration
Keywords
Field
DocType
compiler optimization,energy budget,embedded vliw architecture,energy saving,vliw,low-power design,energy-aware register assignment method,high processing power,register file,vliw embedded architecture,leakage energy,leakage reduction,joint hardware-software leakage minimization,embedded application,global register file,embedded system,system performance,very long instruction word,process capability
Leakage (electronics),Computer science,Very long instruction word,Register file,Real-time computing,Optimizing compiler,Software,Minification,Integrated circuit,Low-power electronics,Embedded system
Journal
Volume
Issue
ISSN
41
1
Integration, the VLSI Journal
Citations 
PageRank 
References 
4
0.46
35
Authors
7
Name
Order
Citations
PageRank
David Atienza12219149.60
Praveen Raghavan230847.48
José L. Ayala318020.44
Giovanni De Micheli4102451018.13
Francky Catthoor53932423.30
Diederik Verkest61544123.76
Marisa López-Vallejo714520.48