Name
Title | ||
|---|---|---|
A Low-Cost High-Speed Source-Synchronous Interconnection Technique For Gals Chip Multiprocessors |
Abstract | ||
|---|---|---|
The globally asynchronous locally synchronous (GALS) design style for a large area chip has become increasingly attractive due to the difficulty of designing global clocking circuits at high clock frequencies in the GH7 range. In this paper, we present a high-speed interconnect network for a GALS multiprocessing system composed of a 2-D mesh array of processors. Processors are locally clocked by their own oscillators and communicate together using a static circuit-switched technique combined with a source-synchronous communication scheme. A technique to maximize the timing reliability on long-distance interconnects at high clock rates is proposed that is area and power efficient with low latency and allows a sustained ideal peak throughput of one word per cycle. |
Year | DOI | Venue |
|---|---|---|
2009 | 10.1109/ISCAS.2009.5117926 | ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5 |
Keywords | Field | DocType |
oscillations,network synthesis,circuit switched,power efficiency,chip,registers,low latency,synchronous communication,frequency,synchronization | Synchronization,Computer science,Globally asynchronous locally synchronous,Electronic engineering,Chip,Multiprocessing,Latency (engineering),Source-synchronous,Throughput,Interconnection,Embedded system | Conference |
Citations | PageRank | References |
4 | 0.40 | 8 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Anh Thien Tran | 1 | 14 | 0.96 |
| Dean Nguyen Truong | 2 | 33 | 2.24 |
| Bevan M. Baas | 3 | 295 | 27.78 |