Name
Abstract | ||
|---|---|---|
This paper presents one of the first analysis of the temperature dependence of CMOS integrated circuit delay at low voltage. Based on a low voltage extended Sakurai's a-power current law, a detail analysis of the temperature and voltage sensitivity of CMOS structure delay is given. Coupling effects between temperature and voltage are clearly demonstrated. Specific derating factors are defined for the low voltage range (1-3VT0). Experimental validations are obtained on specific ring oscillators integrated on a 0.7mm process by comparing the temperature and voltage evolution of the measured oscillation period to the calculated ones. A low temperature sensitivity operating region has been clearly identified and appears in excellent agreement with the expected calculated values. |
Year | DOI | Venue |
|---|---|---|
1998 | 10.5555/368058.368333 | DATE |
Keywords | Field | DocType |
low voltage application,voltage sensitivity,low voltage range,specific derating factor,temperature effect,cmos integrated circuit delay,detail analysis,temperature dependence,low temperature sensitivity operating,voltage evolution,low voltage,cmos structure delay,derating,cmos integrated circuits,oscillations,ring oscillator | Derating,Oscillation,Computer science,Voltage,CMOS,Electronic engineering,Real-time computing,Low voltage,Integrated circuit,Optoelectronics,Bandgap voltage reference,Voltage divider | Conference |
ISBN | Citations | PageRank |
0-8186-8359-7 | 18 | 4.55 |
References | Authors | |
2 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| J. -M. Daga | 1 | 36 | 11.05 |
| E. Ottaviano | 2 | 18 | 4.55 |
| Daniel Auvergne | 3 | 145 | 31.67 |