Title | ||
---|---|---|
Software simultaneous multi-threading, a technique to exploit task-level parallelism to improve instruction- and data-level parallelism |
Abstract | ||
---|---|---|
The search for energy efficiency in the design of embedded systems is leading toward CPUs with higher instruction-level and data-level parallelism. Unfortunately, individual applications do not have sufficient parallelism to keep all these CPU resources busy. Since embedded systems often consist of multiple tasks, task-level parallelism can be used for the purpose. Simultaneous multi-threading (SMT) proved a valuable technique to do so in high-performance systems, but it cannot be afforded in system with tight energy budgets. Moreover, it does not exploit data-level parallel hardware, and does not exploit the available information on threads. We propose software-SMT (SW-SMT), a technique to exploit task-level parallelism to improve the utilization of both instruction-level and data-level parallel hardware, thereby improving performance. The technique performs simultaneous compilation of multiple threads at design-time, and it includes a run-time selection of the most efficient mixes. We have applied the technique to two major blocks of a SDR (software-defined radio) application, achieving energy gains up to 46% on different ILP and DLP architectures. We show that the potentials of SW-SMT increase with SIMD datapath size and VLIW issue width. |
Year | DOI | Venue |
---|---|---|
2006 | 10.1007/11847083_2 | PATMOS |
Keywords | Field | DocType |
energy gain,software simultaneous multi-threading,data-level parallel hardware,sw-smt increase,valuable technique,data-level parallelism,tight energy budget,task-level parallelism,sufficient parallelism,energy efficiency,embedded system,energy efficient,data level parallelism,software defined radio,energy budget | Instruction-level parallelism,Multithreading,Implicit parallelism,Computer science,Task parallelism,Very long instruction word,Parallel computing,SIMD,Real-time computing,Data parallelism,Memory-level parallelism | Conference |
Volume | ISSN | ISBN |
4148 | 0302-9743 | 3-540-39094-4 |
Citations | PageRank | References |
3 | 0.42 | 18 |
Authors | ||
5 |
Name | Order | Citations | PageRank |
---|---|---|---|
Daniele Paolo Scarpazza | 1 | 98 | 7.43 |
Praveen Raghavan | 2 | 308 | 47.48 |
David Novo | 3 | 110 | 12.88 |
Francky Catthoor | 4 | 3932 | 423.30 |
Diederik Verkest | 5 | 1544 | 123.76 |