Name
Title | ||
|---|---|---|
HAQu: Hardware-accelerated queueing for fine-grained threading on a chip multiprocessor |
Abstract | ||
|---|---|---|
Queues are commonly used in multithreaded programs for synchronization and communication. However, because software queues tend to be too expensive to support finegrained parallelism, hardware queues have been proposed to reduce overhead of communication between cores. Hardware queues require modifications to the processor core and need a custom interconnect. They also pose difficulties for the operating system because their state must be preserved across context switches. To solve these problems, we propose a hardware-accelerated queue, or HAQu. HAQu adds hardware to a CMP that accelerates operations on software queues. Our design implements fast queueing through an application's address space with operations that are compatible with a fully software queue. Our design provides accelerated and OS-transparent performance in three general ways: (1) it provides a single instruction for enqueueing and dequeueing which significantly reduces the overhead when used in fine-grained threading; (2) operations on the queue are designed to leverage low-level details of the coherence protocol; and (3) hardware ensures that the full state of the queue is stored in the application's address space, thereby ensuring virtualization. We have evaluated our design in the context of application domains: offloading fine-grained checks for improved software reliability, and automatic, fine-grained parallelization using decoupled software pipelining. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/HPCA.2011.5749720 | HPCA |
Keywords | Field | DocType |
chip multiprocessor,fine-grained threading,microprocessor chips,haqu,software reliability,processor core,multi-threading,hardware accelerated queueing,operating systems (computers),operating system,improved software reliability,multiprocessing systems,fine-grained check,hardware queue,fine grained threading,application domain,hardware-accelerated queueing,multithreaded programs,fine-grained parallelization,decoupled software pipelining,software pipelining,address space,software queue,hardware queues,hardware-accelerated queue,multi threading,hardware accelerator,acceleration,parallel processing,computer architecture,hardware,instruction sets | Virtualization,Software pipelining,Computer science,Instruction set,Queue,Parallel computing,Real-time computing,Queueing theory,Software,Computer hardware,Software quality,Multi-core processor | Conference |
ISSN | ISBN | Citations |
1530-0897 | 978-1-4244-9432-3 | 8 |
PageRank | References | Authors |
0.45 | 8 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Sanghoon Lee | 1 | 235 | 26.21 |
| Devesh Tiwari | 2 | 272 | 16.97 |
| Yan Solihin | 3 | 2057 | 111.56 |
| James Tuck | 4 | 564 | 33.06 |