Paper Info
Title
Elements of low power design for integrated systems
Abstract
The increasing prominence of portable systems and the need to limit power consumption and hence, heat dissipation in very high density VLSI chips have led to rapid and innovative developments in low power design recently. Leakage control is becoming critically important for deep sub-100nm technologies due to the scaling down of threshold voltage and gate oxide thickness of transistors. In this paper, we discuss major sources of power dissipation in VLSI systems, and various low power design techniques on the technology and circuit level, logic level, and system level.
Year
DOI
Venue
2003
10.1145/871506.871558
ISLPED
Keywords
Field
DocType
circuit level,system level,vlsi chip,power dissipation,heat dissipation,vlsi system,integrated system,various low power design,power consumption,low power design,logic level,cmos,integrated circuit design,integrated circuit,integrable system,low power electronics,chip,threshold voltage,vlsi
Leakage (electronics),Computer science,CMOS,Electronic engineering,Integrated circuit design,Logic level,Transistor,Very-large-scale integration,Electrical engineering,AND gate,Low-power electronics
Conference
ISBN
Citations 
PageRank 
1-58113-682-X
5
0.55
References 
Authors
21
1
Name
Order
Citations
PageRank
Sung-Mo Steve Kang11198213.14