Title
A power-efficient and scalable load-store queue design
Abstract
The load-store queue (LQ-SQ) of modern superscalar processors is responsible for keeping the order of memory operations. As the performance gap between processing speed and memory access becomes worse, the capacity requirements for the LQ-SQ increase, and its design becomes a challenge due to its CAM structure. In this paper we propose an efficient load-store queue state filtering mechanism that provides a significant energy reduction (on average 35% in the LSQ and 3.5% in the whole processor), and only incurs a negligible performance loss of less than 0.6%.
Year
DOI
Venue
2005
10.1007/11556930_1
PATMOS
Keywords
Field
DocType
modern superscalar processor,cam structure,negligible performance loss,efficient load-store queue state,capacity requirement,lq-sq increase,memory access,load-store queue,performance gap,memory operation,scalable load-store queue design,power efficiency
Bloom filter,Power efficient,Computer science,Parallel computing,Queue,Filter (signal processing),Real-time computing,Energy reduction,Superscalar,Performance gap,Scalability,Embedded system
Conference
Volume
ISSN
ISBN
3728
0302-9743
3-540-29013-3
Citations 
PageRank 
References 
4
0.42
12
Authors
6
Name
Order
Citations
PageRank
Fernando Castro1588.07
Daniel Chaver211711.35
Luis Pinuel3412.65
Manuel Prieto434931.23
Michael C. Huang587558.47
Francisco Tirado640432.26