Name
Abstract | ||
|---|---|---|
Accurate performance-degradation monitoring of nanometer MOSFET digital circuits is one of the most critical issues in adaptive design techniques for overcoming the performance degradation due to aging phenomena such as negative bias temperature instability (NBTI) and hot carrier injection (HCI). Therefore, this paper proposes new on-chip aging sensor circuits which deploy a threshold voltage detector for monitoring the performance degradation of an aged MOSFET. The new aging sensor circuits measure the threshold voltage difference between a NBTI/HCI stressed MOSFET device and a NBTI/HCI unstressed MOSFET device using an inverter chain and a phase comparator and digitalize the phase difference induced by the threshold voltage difference. The proposed sensor circuits achieve a direct correlation between the threshold voltage degradation and the phase difference (a phase difference resolution of 1 ns per 0.01 V threshold voltage shift). Also, the circuits are almost independent of temperature variation due to symmetrical circuit structures. A 45 nm CMOS technology and predictive NBTI/HCI models have been used to implement and evaluate the proposed circuits. The implemented layout size is 18.58 x 7.97 μm2; the post-layout power consumption is 18.57 μW during NBTI/HCI stress mode and 30.86 μW during NBTI/HCI measurement mode on average. |
Year | DOI | Venue |
|---|---|---|
2010 | 10.1109/TCSII.2010.2067810 | IEEE Trans. on Circuits and Systems |
Keywords | Field | DocType |
degradation,v threshold voltage shift,aging,cmos integrated circuits,performance degradation monitoring,hot carrier injection (hci),hci stress mode,negative bias temperature instability (nbti),integrated circuit reliability,phase comparator,threshold voltage detector,hot carrier injection,hot carriers,aged mosfet,adaptive design techniques,predictive nbti,symmetrical circuit structures,inverter chain,performance degradation,cmos technology,threshold voltage difference,sensor circuit,nanometer mosfet digital circuits,on-chip aging sensor circuits,comparators (circuits),nbti,reliability,temperature variation,reliable nanometer,hci unstressed mosfet device,performance evaluation,mosfet circuits,hci,negative bias temperature instability,hci model,invertors,post-layout power consumption,aging phenomena,threshold voltage shift,phase difference,hci measurement mode,phase difference resolution,nanoelectronics,ageing,mosfet digital circuit,performance-degradation monitoring,stress,digital circuits,human computer interaction,threshold voltage,chip | Nanoelectronics,Hot-carrier injection,Electronic engineering,CMOS,Negative-bias temperature instability,Phase detector,Electronic circuit,MOSFET,Threshold voltage,Electrical engineering,Mathematics | Journal |
Volume | Issue | ISSN |
57 | 10 | 1549-7747 |
Citations | PageRank | References |
33 | 1.52 | 4 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Kyung Ki Kim | 1 | 99 | 21.62 |
| Wei Wang | 2 | 105 | 9.27 |
| Ken Choi | 3 | 108 | 16.95 |