Name
Abstract | ||
|---|---|---|
When a CMOS logic IC is soldered on a printed circuit board, a pin short may occur. When the fault is excited, logical oscillation may be generated at the location where the fault occurs. In this paper, the authors propose a test method based on supply current of a logic circuit and a test circuit to detect a fault in the logic circuit that generates logical oscillation. They show by some experiments that a fault that generates oscillation when the fault is excited will be detected with the test circuit. © 2004 Wiley Periodicals, Inc. Syst Comp Jpn, 35(13): 10–20, 2004; Published online in Wiley InterScience (). DOI 10.1002/scj.10604 |
Year | DOI | Venue |
|---|---|---|
2004 | 10.1002/scj.v35:13 | Systems and Computers in Japan |
Keywords | Field | DocType |
oscillations | Stuck-at fault,Logic gate,Logic probe,Computer science,Circuit extraction,Circuit design,Electrical engineering,Diode-or circuit,Equivalent circuit,Asynchronous circuit | Journal |
Volume | Issue | Citations |
35 | 13 | 1 |
PageRank | References | Authors |
0.36 | 3 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Masahiro Ichimiya | 1 | 4 | 2.36 |
| Masaki Hashizume | 2 | 98 | 27.83 |
| Hiroyuki Yotsuyanagi | 3 | 70 | 19.04 |
| Takeomi Tamesada | 4 | 45 | 12.49 |