Name
Title | ||
|---|---|---|
Current-Source-Sharing Differential-Pair Circuits for a Low-Power Fine-Grain Reconfigurable VLSI Architecture |
Abstract | ||
|---|---|---|
A bit-serial reconfigurable VLSI using multiple-valued switch blocks and binary logic modules is proposed. In a cell, multiple-valued signaling is utilized to implement a compact switch block. Binary-controlled current steering technique is introduced utilizing a programmable series-gating differential-pair circuit to implement high-performance low-power arithmetic logic operations such as an arbitrary two-variable binary logic operation and a full-adder sum. Moreover, current-source sharing between a series-gating differential-pair circuit and a current-mode D-latch is proposed to reduce the current source count to reduce power consumption. As a result, the power consumption and the delay time of the proposed bit-serial cell are reduced to 63% and 72%, respectively, in comparison with those of a previous multiple-valued bit-serial cell. |
Year | DOI | Venue |
|---|---|---|
2012 | 10.1109/ISMVL.2012.13 | ISMVL |
Keywords | Field | DocType |
binary logic module,binary-controlled current steering technique,arbitrary two-variable binary logic,proposed bit-serial cell,previous multiple-valued bit-serial cell,bit-serial reconfigurable,low-power fine-grain reconfigurable vlsi,high-performance low-power arithmetic logic,current-source-sharing differential-pair circuits,power consumption,multiple-valued switch block,compact switch block,vlsi,logic circuits | Logic gate,Computer science,Current source,Electronic engineering,Boolean algebra,Logic family,Electronic circuit,Very-large-scale integration,Power consumption,Programmable logic device | Conference |
ISSN | Citations | PageRank |
0195-623X | 6 | 0.61 |
References | Authors | |
5 | 2 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Xu Bai | 1 | 37 | 9.94 |
| Michitaka Kameyama | 2 | 431 | 99.93 |