Xu Bai - Citegraph

Author Info

Name	Affiliation	Papers
XU BAI	Tohoku Univ, Grad Sch Informat Sci, Aoba Yama 6-6-05, Sendai, Miyagi 9808579, Japan	26
Collaborators	Citations	PageRank
68	37	9.94
Referers	Referees	References
75	137	91

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100137

Publications (26 rows)

Collaborators (68 rows)

Referers (75 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
Subsurface Voids Detection from Limited Ground Penetrating Radar Data Using Generative Adversarial Network and YOLOV5.	0	0.34	2021
MSCNN: Steganographer Detection Based on Multi-Scale Convolutional Neural Networks	0	0.34	2021
Dual Adversarial Network Based on BERT for Cross-domain Sentiment Classification.	1	0.35	2021
Snake: An Asynchronous Pipeline For Ultra-Low-Power Applications (Vol 16, 20190293, 2019)	0	0.34	2020
A Fault Detection And Diagnosis Method For Via-Switch Crossbar In Non-Volatile Fpga	0	0.34	2020
A Low-Overhead Error Detection And Correction Technique With A Relaxed Error Timing Constraint For Variation-Tolerance (Vol 16, 20190342, 2019)	0	0.34	2020
A Novel Gain Control Method Based On Extremum Envelope For High Speed Array Gpr	0	0.34	2020
A 171k-LUT Nonvolatile FPGA using Cu Atom-Switch Technology in 28nm CMOS	0	0.34	2020
A New Feature Selection Algorithm Based on Category Difference for Text Categorization.	0	0.34	2019
A 3-D Migration Imaging Algorithm Suitable For Expressway Detection	0	0.34	2019
Automatic Identification Of Underground Pipeline Based On Ground Penetrating Radar	0	0.34	2019
A Scalable Architecture For Low-Latency Market-Data Processing On Fpga	0	0.34	2016
Eavesdropping-Based Gossip Algorithms for Distributed Consensus in Wireless Sensor Networks	1	0.36	2015
Implementation Of Voltage-Mode/Current-Mode Hybrid Circuits For A Low-Power Fine-Grain Reconfigurable Vlsi	0	0.34	2014
Multiple-Valued Fine-Grain Reconfigurable Vlsi Using A Global Tree Local X-Net Network	0	0.34	2014
Design of a Logic-in-Memory Multiple-Valued Reconfigurable VLSI Based on a Bit-Serial Packet Data Transfer Scheme	2	0.49	2014
A Bit-Serial Reconfigurable Vlsi Based On A Multiple-Valued X-Net Data Transfer Scheme	4	0.48	2013
A Multiple-Valued Reconfigurable Vlsi Architecture Using Binary-Controlled Differential-Pair Circuits	3	0.46	2013
An Area-Efficient Multiple-Valued Reconfigurable VLSI Architecture Using an X-Net	2	0.48	2013
Low-Power Multiple-Valued Source-Coupled Logic Circuits Using Dual-Supply Voltages for a Reconfigurable VLSI	1	0.35	2013
A Digit-Serial Reconfigurable VLSI Based on Quaternary Inter-Cell Data Transfer Scheme.	15	0.58	2012
Current-Source-Sharing Differential-Pair Circuits for a Low-Power Fine-Grain Reconfigurable VLSI Architecture	6	0.61	2012
Empirical Research in Software Process Modeling: A Systematic Literature Review	2	0.37	2011
The Quantitative Evaluation on X3D-Based ORGDM	0	0.34	2009
Risk Perception in Modeling Malware Propagation in Networks	0	0.34	2009
Modeling Malicious Code Spread in Scale-Free Networks of Moving Agents	0	0.34	2008