Name
Abstract | ||
|---|---|---|
Conventional single-die microelectronic packages on a printed circuit board have been with us for a long time. These electronic packages provide a means of interconnecting, powering, cooling, and protecting integrated circuit chips. Today, system-in-package (SiP) provides a variety of packaging requirements for computer, consumer, aerospace, military, and medical electronic applications by stacking individual IC chips to form 3D circuits. This packaging technology offers reduced form factor to enhance high performance and reliability. The guest editors discuss some of the obstacles SiP technology must overcome for wider use and how this special issue addresses those obstacles. |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1109/MDT.2006.69 | IEEE Design & Test of Computers |
Keywords | Field | DocType |
packaging requirement,small packages,printed circuit board,form factor,integrated circuit chip,packaging technology,obstacles sip technology,conventional single-die microelectronic package,big innovations,electronic package,guest editors,guest editor,medical electronic application,system in package,chip,integrated circuit,sip | Aerospace,System in package,Computer science,Integrated circuit packaging,Circuit design,Electronic engineering,Dual in-line package,Packaging engineering,Electronic circuit,Integrated circuit | Journal |
Volume | Issue | ISSN |
23 | 3 | 0740-7475 |
Citations | PageRank | References |
1 | 0.35 | 0 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Bruce C. Kim | 1 | 89 | 21.11 |
| Yervant Zorian | 2 | 1994 | 215.23 |