Name
Abstract | ||
|---|---|---|
Computing systems designed using reconfigurable hardware are increasingly composed using a number of different Intellectual Property (IP) cores, which are often provided by third-party vendors that may have different levels of trust. Unlike traditional software where hardware resources are mediated using an operating system, IP cores have fine-grain control over the underlying reconfigurable hardware. To address this problem, the embedded systems community requires novel security primitives that address the realities of modern reconfigurable hardware. In this work, we propose security primitives using ideas centered around the notion of “moats and drawbridges.” The primitives encompass four design properties: logical isolation, interconnect traceability, secure reconfigurable broadcast, and configuration scrubbing. Each of these is a fundamental operation with easily understood formal properties, yet they map cleanly and efficiently to a wide variety of reconfigurable devices. We carefully quantify the required overheads of the security techniques on modern FPGA architectures across a number of different applications. |
Year | DOI | Venue |
|---|---|---|
2010 | 10.1145/1754386.1754391 | TRETS |
Keywords | Field | DocType |
controlled sharing,execution monitors,underlying reconfigurable hardware,memory protection,different intellectual property,hardware security,reconfigurable hardware-based systems,enforcement mechanisms,secure reconfigurable broadcast,reconfigurable hardware,different application,isolation,novel security primitive,reconfigurable device,systems-on-a-chip socs,modern reconfigurable hardware,field programmable gate arrays fpgas,different level,hardware resource,security policies,security primitives,separation,static analysis,reference monitors,advanced encryption standard aes,field programmable gate arrays,computer architecture,security policy,advanced encryption standard,embedded system,system design,embedded systems,operating system,coding,field programmable gate array,intellectual property,system on a chip | Memory protection,Hardware security module,Computer science,Static analysis,Parallel computing,Field-programmable gate array,Real-time computing,Software,Security policy,Traceability,Reconfigurable computing,Embedded system | Journal |
Volume | Issue | ISSN |
3 | 2 | 1936-7406 |
Citations | PageRank | References |
6 | 0.50 | 40 |
Authors | ||
8 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ted Huffmire | 1 | 204 | 11.80 |
| Timothy Levin | 2 | 165 | 10.38 |
| Thuy Nguyen | 3 | 795 | 42.13 |
| Cynthia Irvine | 4 | 167 | 19.58 |
| Brett Brotherton | 5 | 97 | 5.93 |
| Gang Wang | 6 | 362 | 17.80 |
| Timothy Sherwood | 7 | 1921 | 123.28 |
| Ryan Kastner | 8 | 1779 | 147.73 |