Title
A New BIST Architecture for Low Power Circuits
Abstract
Linear Feedback Shift Registers (LFSRs) are commonly used as pseudo-random test pattern generators (TPGs) in BIST schemes. This paper presents a fast simulation-based method to compute an efficient seed (initial state) of a given primitive polynomial ...
Year
DOI
Venue
1999
10.1109/ETW.1999.804523
ETW '99 Proceedings of the 1999 IEEE European Test Workshop
Keywords
DocType
ISBN
primitive polynomial,linear feedback shift registers,pseudo-random test pattern generator,efficient seed,low power circuits,initial state,bist scheme,fast simulation-based method,new bist architecture,cellular automaton,design flow,automatic test pattern generation,vlsi,normal operator,low power electronics,normal modes,lfsr,fault coverage,packaging
Conference
0-7695-0390-X
Citations 
PageRank 
References 
18
1.23
8
Authors
4
Name
Order
Citations
PageRank
F. Corno160255.65
M. Rebaudengo259345.50
M. Sonza Reorda31099114.76
M. Violante4191.69