Name
Abstract | ||
|---|---|---|
A reliable, energy-efficient on-chip interconnection network employing low-swing signaling can be designed by incorporating error-correcting code. Orthogonal Latin Square Code (OLSC) can protect the interconnection against transient errors, while also lowering energy consumption. When applied to a 64-bit link using a 45-nm CMOS technology with low-swing signaling, OLSC provided up to 55% energy reduction, with only a small area overhead and no loss in reliability. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/MDT.2011.35 | IEEE Design & Test of Computers |
Keywords | Field | DocType |
on-chip interconnection,multiprocessor interconnection networks,energy reduction,orthogonal latin square code,low- swing signaling,orthogonal latin square,orthogonal latin squares code,45-nm cmos technology,error correction codes,system-on-chip,cmos technology,error-correcting code,resilience and low power design,ecc,64-bit link,transient errors,energy consumption,reliability,small area overhead,olsc,resilient interconnection,energy-efficient on-chip interconnection network,design and test,transient error,orthogonal latin squares,ofdm,decoding,error correction code,error correcting code,system on chip,system on a chip,encoding,crosstalk,chip | System on a chip,Computer science,Electronic engineering,Error detection and correction,CMOS,Decoding methods,Graeco-Latin square,Interconnection,Energy consumption,Orthogonal frequency-division multiplexing | Journal |
Volume | Issue | ISSN |
28 | 2 | 0740-7475 |
Citations | PageRank | References |
10 | 0.71 | 5 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Seung Eun Lee | 1 | 224 | 22.34 |
| Yoon Seok Yang | 2 | 110 | 11.02 |
| Gwan Choi | 3 | 369 | 56.66 |
| Wu Wei | 4 | 204 | 14.84 |
| Ravishankar K. Iyer | 5 | 1119 | 75.72 |