Cache Compression with Efficient in-SRAM Data Comparison | 0 | 0.34 | 2021 |
RLDRM: Closed Loop Dynamic Cache Allocation with Deep Reinforcement Learning for Network Function Virtualization | 0 | 0.34 | 2020 |
Neural Cache: Bit-Serial In-Cache Acceleration of Deep Neural Networks. | 29 | 0.71 | 2018 |
Visual IoT: Ultra-Low-Power Processing Architectures and Implications. | 4 | 0.53 | 2017 |
QoS Management on Heterogeneous Architecture for Multiprogrammed, Parallel, and Domain-Specific Applications. | 0 | 0.34 | 2017 |
Visual IoT: Architectural Challenges and Opportunities; Toward a Self-Learning and Energy-Neutral IoT. | 1 | 0.35 | 2016 |
Design of a low power SoC testchip for wearables and IoTs | 0 | 0.34 | 2015 |
Platform-aware dynamic configuration support for efficient text processing on heterogeneous system | 0 | 0.34 | 2015 |
A Case Study on the Communication and Computation Behaviors of Real Applications in NoC-Based MPSoCs | 15 | 0.75 | 2014 |
A systematic network-on-chip traffic modeling and generation methodology | 2 | 0.37 | 2014 |
QoS management on heterogeneous architecture for parallel applications | 2 | 0.36 | 2014 |
Moral values from simple game play | 1 | 0.35 | 2013 |
Reducing cache and TLB power by exploiting memory region and privilege level semantics. | 1 | 0.35 | 2013 |
Reducing L1 caches power by exploiting software semantics | 3 | 0.41 | 2012 |
Dynamic QoS management for chip multiprocessors | 6 | 0.41 | 2012 |
Optimizing datacenter power with memory system levers for guaranteed quality-of-service | 7 | 0.43 | 2012 |
Buffer-integrated-Cache: a cost-effective SRAM architecture for handheld and embedded platforms | 10 | 0.61 | 2011 |
CogniServe: Heterogeneous Server Architecture for Large-Scale Recognition | 12 | 0.76 | 2011 |
CHOP: Integrating DRAM Caches for CMP Server Platforms | 23 | 0.86 | 2011 |
Template-based memory access engine for accelerators in SoCs | 5 | 0.44 | 2011 |
RAFT: A router architecture with frequency tuning for on-chip networks | 19 | 0.71 | 2011 |
Low-Power, Resilient Interconnection with Orthogonal Latin Squares | 10 | 0.71 | 2011 |
CoQoS: Coordinating QoS-aware shared resources in NoC-based SoCs | 17 | 0.58 | 2011 |
NCID: a non-inclusive cache, inclusive directory architecture for flexible and efficient cache hierarchies | 6 | 0.46 | 2010 |
Boomerang: Reducing Power Consumption of Response Packets in NoCs with Minimal Performance Impact | 1 | 0.37 | 2010 |
PIRATE: QoS and performance management in CMP architectures | 12 | 0.58 | 2010 |
Rate-based QoS techniques for cache/memory in CMP platforms | 27 | 1.33 | 2009 |
Hardware/Software Co-Simulation for Last Level Cache Exploration | 0 | 0.34 | 2009 |
A case for dynamic frequency tuning in on-chip networks | 61 | 1.75 | 2009 |
Virtual platform architectures for resource metering in datacenters | 12 | 0.61 | 2009 |
Modeling virtual machine performance: challenges and approaches | 31 | 1.46 | 2009 |
Accelerating mobile augmented reality on a handheld platform | 22 | 1.28 | 2009 |
VM3: Measuring, modeling and managing VM shared resources | 37 | 2.18 | 2009 |
Performance characterization and optimization of mobile augmented reality on handheld platforms | 10 | 0.86 | 2009 |
Achieving 10Gbps network processing: are we there yet? | 2 | 0.44 | 2008 |
Towards hybrid last level caches for chip-multiprocessors | 17 | 0.98 | 2008 |
Secure Web-Based Sharing of Health Information Services Using Ad-Hoc Dynamic Coalitions | 0 | 0.34 | 2008 |
Implications of cache asymmetry on server consolidation performance | 15 | 0.91 | 2008 |
Characterization & analysis of a server consolidation benchmark | 27 | 2.04 | 2008 |
Towards modeling & analysis of consolidated CMP servers | 15 | 0.76 | 2008 |
Coalition Service Registry for Ad-hoc Dynamic Coalitions | 0 | 0.34 | 2008 |
qTLB: looking inside the look-aside buffer | 5 | 0.47 | 2007 |
Hardware Support for Accelerating Data Movement in Server Platform | 12 | 0.74 | 2007 |
CacheScouts: Fine-Grain Monitoring of Shared Caches in CMP Platforms | 47 | 3.12 | 2007 |
From chaos to QoS: case studies in CMP resource management | 41 | 1.70 | 2007 |
Addressing Cache/Memory Overheads in Enterprise Java CMP Servers | 4 | 0.45 | 2007 |
Exploring Large-Scale CMP Architectures Using ManySim | 17 | 1.17 | 2007 |
I/O processing in a virtualized platform: a simulation-driven approach | 9 | 1.06 | 2007 |
Architectural characterization of VM scaling on an SMP machine | 1 | 0.38 | 2006 |
Receive side coalescing for accelerating TCP/IP processing | 17 | 2.89 | 2006 |