Name
Abstract | ||
|---|---|---|
The paper presents the design and development of an E1 Transceiver with specifications posed by the ITU G.703 and ITU G.823 recommendations and INTRACOM S.A. (Hellenic Telecommunications and Electronics Industry, R&D Department). The development procedure is based on the use of standard HDL and fulfills the requirements placed by industry for code reusability. The core design was successfully implemented in FPGA and ASIC technology. The verification in FPGA technology enables the rapid prototyping of a system using the specific core. |
Year | DOI | Venue |
|---|---|---|
1999 | 10.1109/IWRSP.1999.779026 | IEEE International Workshop on Rapid System Prototyping |
Keywords | Field | DocType |
specific core,reusable e1 transceiver suitable,e1 transceiver,itu g.823 recommendation,d department,core design,development procedure,fpga technology,itu g.703,electronics industry,rapid prototyping,asic technology,hardware description language,field programmable gate arrays,code reusability,hardware description languages,prototypes,application specific integrated circuits,verification,informatics,firmware,transceivers | Rapid prototyping,Computer architecture,Computer science,Field-programmable gate array,Software prototyping,FPGA prototype,Application-specific integrated circuit,Reusability,Hardware description language,Embedded system,Firmware | Conference |
ISSN | ISBN | Citations |
1074-6005 | 0-7695-0246-6 | 1 |
PageRank | References | Authors |
0.35 | 0 | 6 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| A. Vasilliou | 1 | 1 | 0.35 |
| K. Gounaris | 2 | 1 | 0.35 |
| K. D. Adaos | 3 | 15 | 2.88 |
| G. P. Alexiou | 4 | 9 | 3.18 |
| D. Nikolos | 5 | 291 | 31.38 |
| D. Mitsainas | 6 | 1 | 0.35 |