Name
Abstract | ||
|---|---|---|
SRAM-based FPGA devices are becoming a suitable platform for implementing modern Systems On Programmable Chip (SOPC) due to their high reconfigurability, low cost and availability. The high performance SOPCs are often powered by multiple embedded microprocessors. FPGA devices are susceptible to radiation which causes soft-errors in their configuration memory. This paper proposes a soft error recovery technique for FPGA SOPC with multiple processors. The recovery algorithm runs on one of the embedded microprocessors at a time. The algorithm checks the configuration memory of the FPGA through the internal configuration access port and repairs a faulty configuration bit through partial reconfiguration. The technique also includes an extended recovery procedure where, upon the failure of the processor that runs the recovery algorithm, the error is recovered by another working processor. The proposed error recovery technique was verified by a case study and a fault emulation experiment. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/ATS.2011.22 | Asian Test Symposium |
Keywords | Field | DocType |
multiprocessor sopc,faulty configuration bit,proposed error recovery technique,sram-based fpga device,soft error recovery technique,internal configuration access port,configuration memory,fpga device,extended recovery procedure,fpga sopc,recovery algorithm,system on chip,field programmable gate array,error correction code,emulation,field programmable gate arrays,soft error,chip,hardware | Reconfigurability,System on a chip,Soft error,Computer science,Field-programmable gate array,Real-time computing,Electronic engineering,Static random-access memory,Single event upset,Control reconfiguration,Recovery procedure,Embedded system | Conference |
ISSN | Citations | PageRank |
1081-7735 | 0 | 0.34 |
References | Authors | |
5 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Uros Legat | 1 | 11 | 1.98 |
| A. Biasizzo | 2 | 52 | 8.08 |
| F. Novak | 3 | 110 | 21.81 |