Name
Abstract | ||
|---|---|---|
In this work we present a design space exploration of the memory subsystem of our configurable CoreVA VLIW architecture. The development of resource efficient processor architectures is based on a two-stage tool flow using a high-level processor specification as a reference. We evaluate several memory configurations like one memory port or two memory ports, as well as different write-miss-allocation modes. Applications ranging from LTE protocol stack over baseband processing up to cryptography and multimedia are evaluated in terms of execution time and energy efficiency. Analyses have shown that the application specific configuration of the memory subsystem can improve energy by up to 25%. Our environment allows the rapid profiling and evaluation of algorithms to choose the most efficient configuration. |
Year | DOI | Venue |
|---|---|---|
2010 | 10.1109/NAS.2010.14 | Networking, Architecture and Storage |
Keywords | Field | DocType |
vliw architectures,efficient configuration,configurable coreva vliw architecture,memory configuration,memory subsystems,memory port,application specific configuration,resource efficient processor architecture,lte protocol,design space exploration,high-level processor specification,memory subsystem,energy efficiency,cryptography,registers,memory management,vliw,processor architecture,instruction sets,very long instruction word,cache,hardware,energy efficient | Computer architecture,Uniform memory access,Extended memory,Shared memory,Computer science,Distributed memory,Computing with Memory,Real-time computing,Memory management,Non-uniform memory access,Flat memory model | Conference |
ISBN | Citations | PageRank |
978-1-4244-8133-0 | 4 | 0.49 |
References | Authors | |
12 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Thorsten Jungeblut | 1 | 33 | 7.67 |
| Gregor Sievers | 2 | 19 | 3.26 |
| Mario Porrmann | 3 | 420 | 50.91 |
| Ulrich Ruckert | 4 | 71 | 7.70 |