Paper Info
Title
"Floating point RNS": a new concept for designing the MAC unit of digital signal processor
Abstract
Execution of arithmetic operations at a very high speed in real time is the major concern in compute intensive digital signal processing (DSP) algorithms Residue Number Systems are being considered as alternative to binary number system because of their capabilities of performing "carry free" arithmetic operations. However, RNS systems have so far been used to handle integer numbers only. Floating Point RNS arithmetic units have obvious advantages over fixed point multiply & accumulate (MAC) units which are the key units in Digital Signal Processors. Keeping this in view, in this paper, the architecture of a floating point MAC unit is presented.
Year
DOI
Venue
2012
10.1145/2234336.2234343
SIGARCH Computer Architecture News
Keywords
Field
DocType
fixed point,rns system,mac unit,algorithms residue number systems,integer number,point rns arithmetic unit,high speed,digital signal processor,new concept,floating point,arithmetic operation,digital signal processors,residue number system,real time,digital signal processing
Fixed-point arithmetic,Computer science,Digital signal processor,Floating point,Floating-point unit,Parallel computing,Arithmetic logic unit,Binary scaling,Logarithmic number system,Saturation arithmetic,Computer hardware
Journal
Volume
Issue
Citations 
40
2
0
PageRank 
References 
Authors
0.34
2
3
Name
Order
Citations
PageRank
Aniruddha Ghosh114011.32
Satrughna Singha201.01
Amitabha Sinha3147.00