Title
A low-power instruction replay mechanism for design of resilient microprocessors
Abstract
There is a growing concern about the increasing rate of defects in computing substrates. Traditional redundancy solutions prove to be too expensive for commodity microprocessor systems. Modern microprocessors feature multiple execution units to take advantage of instruction level parallelism. However, most workloads do not exhibit the level of instruction level parallelism that a typical microprocessor is resourced for. This offers an opportunity to reexecute instructions using idle execution units. But, relying solely on idle resources will not provide full instruction coverage and there is a need to explore other alternatives. To that end, we propose and evaluate two instruction replay schemes within the same core for online testing of the execution units. One scheme (RER) reexecutes only the retired instructions, while the other (REI) reexecutes all the issued instructions. The complete proposed solution requires a comparator and minor modifications to control logic, resulting in negligible hardware overhead. Both soft and hard error detection are considered and the performance and energy impact of both schemes are evaluated and compared against previously proposed redundant execution schemes. Results show that even though the proposed schemes result in a small performance penalty when compared to previous work, the energy overhead is significantly reduced.
Year
DOI
Venue
2014
10.1145/2560034
ACM Trans. Embedded Comput. Syst.
Keywords
Field
DocType
complete proposed solution,execution unit,low-power instruction replay mechanism,idle execution unit,proposed schemes result,multiple execution unit,instruction replay scheme,retired instruction,resilient microprocessors,instruction level parallelism,redundant execution scheme,full instruction coverage
Instruction-level parallelism,Hard error,Comparator,Idle,Computer science,Microprocessor,Parallel computing,Real-time computing,Redundancy (engineering),Control logic,Embedded system
Journal
Volume
Issue
ISSN
13
Issue-in-Progress
1539-9087
Citations 
PageRank 
References 
2
0.41
18
Authors
3
Name
Order
Citations
PageRank
R. Rodrigues111110.56
Arunachalam Annamalai2845.67
Sandip Kundu31103137.18