Abstract | ||
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A polynomial-based division algorithm and a corresponding hardware structure are proposed. The proposed algorithm is shown to be competitive to other conventional algorithms like the Newton-Raphson algorithm for up to about 32 bits accuracy. For example, using Newton-Raphson with less than 12 bits accuracy of the initial approximation, requires 33% more general multiplications than the proposed algorithm, in order to achieve 24 bits accuracy. |
Year | DOI | Venue |
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2002 | 10.1109/ISCAS.2002.1010288 | Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium |
Keywords | Field | DocType |
VLSI,computational complexity,digital arithmetic,dividing circuits,iterative methods,32 bit,accuracy,computational complexity,digital signal processing,general multiplications,hardware structure,iterations,polynomial-based division algorithm | Division algorithm,Approximation algorithm,Mathematical optimization,Ramer–Douglas–Peucker algorithm,Polynomial,Control theory,Computer science,Algorithm,Polynomial long division,FSA-Red Algorithm,Key size,Computational complexity theory | Conference |
Volume | Citations | PageRank |
3 | 2 | 0.44 |
References | Authors | |
2 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Robert Hägglund | 1 | 2 | 0.44 |
Per Lowenborg | 2 | 395 | 40.45 |
Mark Vesterbacka | 3 | 2 | 0.44 |