Title | ||
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Performance analysis and optimization of schedules for conditional and loop-intensive specifications |
Abstract | ||
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This paper presents a new method, based on Markov chain analysis, to evaluate the performance of schedules of be- havioral specifications. The proposed performance measure is the expected number of clock cycles required by the schedule for a complete execution of the behavioral specification for any dis- tribution of inputs. The measure considers both the repetition of operations (due to loops) and their conditional execution (due to conditional branches). We propose an efficient technique to calculate the metric. We introduce a loop-directed scheduling al- gorithm (LDS). The algorithm produces schedules such that the expected number of clock cycles, required by the schedule for a complete execution of the behavioral specification, is minimized. Experimental results on several conditional and loop-intensive specifications demonstrate the relevance and effectiveness of both the performance measure and the scheduling algorithm. |
Year | DOI | Venue |
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1994 | 10.1145/196244.196477 | DAC |
Keywords | Field | DocType |
performance analysis,loop-intensive specification,scheduling algorithm,computer science,markov chain,national electric code | Mathematical optimization,Fair-share scheduling,Scheduling (computing),Computer science,Markov chain,Algorithm,Two-level scheduling,Real-time computing,Schedule,Rate-monotonic scheduling,Dynamic priority scheduling,National Electrical Code | Conference |
ISSN | ISBN | Citations |
0738-100X | 0-89791-653-0 | 45 |
PageRank | References | Authors |
4.89 | 7 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Subhrajit Bhattacharya | 1 | 462 | 36.93 |
Sujit Dey | 2 | 3067 | 278.74 |
Franc Brglez | 3 | 525 | 80.13 |