Name
Title | ||
|---|---|---|
On the Accuracy of Return Path Assumption for Loop Inductance Extraction for 0.1µm Technology and Beyond |
Abstract | ||
|---|---|---|
The most common assumption for chip-level inductance extraction is to restrict the current return path to the closest power or ground lines. This paper shows that this assump- tion is not necessarily valid for technologies beyond0.1µm. The actual inductance can exceed twice the value that is ex- tracted from the model considering only the nearest current return paths. Analytical formulae to predict the worst case self inductance are proposed to deal with the errors that re- sult from this assumption. These equations can be used as metrics to decide the size of inductance extraction window for future CAD tools. |
Year | Venue | Keywords |
|---|---|---|
2003 | ISQED '03 Proceedings of the 4th International Symposium on Quality Electronic Design | worst caseself inductance,chip-level inductanceextraction,CAD tool,Return Path Assumption,common assumption,Analytical formula,m Technology,Loop Inductance Extraction,nearest currentreturn path,inductance extraction windowfor future,actual inductance,ground line,current return path |
DocType | ISBN | Citations |
Conference | 0-7695-1881-8 | 5 |
PageRank | References | Authors |
0.64 | 3 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Soyoung Kim | 1 | 168 | 22.15 |
| Yehia Massoud | 2 | 772 | 113.05 |
| S. Simon Wong | 3 | 332 | 40.81 |