Paper Info
Title
A Single-40 Gb/s Dual-20 Gb/s Serializer IC With SFI-5.2 Interface in 65 nm CMOS
Abstract
This paper presents a 40 Gb/s serializer IC in 65 nm bulk CMOS technology. The IC has an SFI5.2-compliant 10 Gb/s input interface and supports two different output modes, single 40 Gb/s for OC-768 VSR and dual 20 Gb/s for DQPSK. The IC is evaluated on a PCB and error-free operation is confirmed. The chip consumes 1.8 W for the 40 G mode, and 1.6 W for the 20 G mode from 1.2 V and 3.3 V power supplies.
Year
DOI
Venue
2009
10.1109/JSSC.2009.2031030
Solid-State Circuits, IEEE Journal of
Keywords
Field
DocType
differential phase shift keying,sfi-5.2 compliant interface,cmos integrated circuits,sfi5.2,single output mode,bit rate 10 gbit/s,voltage 1.2 v,size 65 nm,oc-768 vsr,oc-768,optical transmission systems,voltage 3.3 v,dual output mode,65 nm cmos,pcb,power 1.8 w,quadrature phase shift keying,optical communication equipment,printed circuits,dqpsk,bulk cmos technology,bit rate 20 gbit/s,serializer ic,bit rate 40 gbit/s,power 1.6 w,40 gb/s,chip,adaptive optics,measurement uncertainty,oc 768
Computer science,Transponder,Optical Carrier transmission rates,CMOS,Electronic engineering,Serializer,Modulation,Transponder (aeronautics),Electrical engineering,Integrated circuit,Synchronous optical networking
Journal
Volume
Issue
ISSN
44
12
0018-9200
Citations 
PageRank 
References 
14
2.23
3
Authors
18
Name
Order
Citations
PageRank
Kouichi Kanda1567.86
Hirotaka Tamura220432.19
Takuji Yamamoto310022.09
Satoshi Matsubara4142.23
Masaya Kibune514318.48
Yoshiyasu Doi611517.56
Takayuki Shibasaki76612.00
Nestoras Tzartzanis817240.53
Anders Kristensson9303.65
Samir Parikh10357.13
Satoshi Ide11407.35
Yukito Tsunoda12337.23
Tetsuji Yamabana13303.65
Mariko Sugawara14364.41
Naoki Kuwata15303.99
Tadashi Ikeuchi16316.31
Junji Ogawa1710012.63
William W. Walker1816324.36