Name
Abstract | ||
|---|---|---|
The design of an asynchronous clone of a MIPS R3000 microprocessor is presented. In 0.6 micron CMOS, we expect performance close to 280 MIPS, for a power consumption of 7 Watts. The paper describes the structure of a high- performance asynchronous pipeline, in particular precise exceptions, pipelined caches, arithmetic, and registers, and the circuit techniques developed to achieve high frequency. |
Year | DOI | Venue |
|---|---|---|
1997 | 10.1109/ARVLSI.1997.634853 | ARVLSI |
Keywords | Field | DocType |
asynchronous mips r3000 microprocessor,particular precise exception,micron cmos,asynchronous clone,power consumption,mips r3000 microprocessor,pipelined cache,high frequency,performance asynchronous pipeline,circuit technique,performance close,cmos technology,throughput,low voltage,pipelines,computer architecture,robustness,vlsi,arithmetic,high throughput,computer science,registers | Pipeline (computing),Asynchronous communication,Computer architecture,Asynchronous system,Computer science,Microprocessor,CMOS,Throughput,Very-large-scale integration,Power consumption,Embedded system | Conference |
ISBN | Citations | PageRank |
0-8186-7913-1 | 165 | 19.24 |
References | Authors | |
3 | 8 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Alain J. Martin | 1 | 1095 | 336.96 |
| Andrew Lines | 2 | 463 | 39.70 |
| Rajit Manohar | 3 | 1038 | 96.72 |
| mika nystrom | 4 | 165 | 19.24 |
| paul i penzes | 5 | 165 | 19.24 |
| robert southworth | 6 | 165 | 19.24 |
| Uri Cummings | 7 | 200 | 22.68 |
| t k lee | 8 | 181 | 21.28 |