Name
Title | ||
|---|---|---|
Matrix Odd-Even Partition: A High Power-Efficient Solution to the Small Grain Data Shuffle |
Abstract | ||
|---|---|---|
The shuffle operation is one of the bottlenecks invector DSPs. The partitioning problem of the shuffle matrix will have a great effect on the design of the shuffle unit, when dealing with the small grain data shuffle using a smaller-sized crossbar. The traditional matrix block partitioning solution will bring much chip area, power consumption and critical path delay. This paper presents a new matrix partitioning solution: the odd-even partition, which has advantages in dealing with the data going into or out of the shuffle network. It can simplify the hardware design and improve the power efficacy of the shuffle unit in vector DSPs, compared with the matrix block partitioning solution. The principles and theorems of the odd-even partition are explained and proofed. The shuffle unit based on the odd-even partition is implemented. Some contrastive experimental results show that the odd-even partitioning solution can decrease the critical path delay by 12.2%~21.6%, reduce the hardware area by 20.9%~40.8% and cut down the power consumption by 23.5%~56.8%, compared with the matrix block partitioning solution. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/NAS.2011.29 | NAS |
Keywords | Field | DocType |
power aware computing,odd-even partitioning solution,power consumption,odd-even partition,matrix block,matrix algebra,high power-efficient solution,dsp,matrix odd even partition,digital signal processing chips,matrix odd-even partition,shuffle matrix,shuffle unit,shuffle operation,hardware design,matrix block partitioning solution,critical path delay,small grain data shuffle,power efficient solution,shuffle network,power efficacy,decision support system,hardware,indexation,registers,chip,critical path,indexes,decision support systems,digital signal processing | Digital signal processing,Matrix partitioning,Power efficient,Computer science,Matrix (mathematics),Parallel computing,Chip,Real-time computing,Partition (number theory),Crossbar switch,Power consumption | Conference |
ISBN | Citations | PageRank |
978-0-7695-4509-7 | 0 | 0.34 |
References | Authors | |
7 | 5 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Sheng Liu | 1 | 1 | 1.76 |
| Shuming Chen | 2 | 138 | 38.21 |
| Jiang-Hua Wan | 3 | 15 | 5.86 |
| HaiYan Chen | 4 | 0 | 0.34 |
| Yaohua Wang | 5 | 44 | 14.23 |