Name
Abstract | ||
|---|---|---|
The performance of a traditional cache memory hierarchy can be improved by utilizing mechanisms such as a victim cache or a stream buffer (cache assists). The amount of on-chip memory for cache assist is typically limited for technological reasons. In addition, the cache assist size is limited in order to maintain a fast access time. Performance gains from using a stream buffer or a victim cache, or a combination of the two, varies from program to program as well as within a program. Therefore, ... |
Year | DOI | Venue |
|---|---|---|
2000 | 10.1007/3-540-39999-2_9 | High Performance Computing |
Keywords | Field | DocType |
stream buffer,compiler-directed cache assist adaptivity,victim cache,system performance,on-chip memory,relative size,memory size,cache memory performance,traditional cache memory hierarchy,performance gain,limited amount,cache memory,chip | Cache-oblivious algorithm,Cache invalidation,Cache pollution,Cache,Computer science,Parallel computing,Page cache,Cache algorithms,Cache coloring,Smart Cache,Distributed computing,Embedded system | Conference |
Volume | ISSN | ISBN |
1940 | 0302-9743 | 3-540-41128-3 |
Citations | PageRank | References |
5 | 0.50 | 14 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Xiaomei Ji | 1 | 75 | 5.95 |
| Dan Nicolaescu | 2 | 57 | 4.70 |
| Alexander V. Veidenbaum | 3 | 757 | 78.24 |
| Alexandru Nicolau | 4 | 2265 | 307.74 |
| Rajesh K. Gupta | 5 | 4570 | 390.84 |