Paper Info
Title
Retargetable estimation scheme for DSP architecture selection
Abstract
Given the recent wave of innovation and diversification in digital signal processor (DSP) architecture, the need for quickly evaluating the true potential of considered architectural choices for a given application has been rising. We propose a new scheme, called retargetable estimation, that involves analysis of a high-level description of a DSP application, with aggressive optimization search, to provide a performance estimate of its optimal implementation on the architectures considered. With this scheme, we present a new parameterized architecture model that allows quick retargeting to a wide range of architectural choices, and that emphasizes capturing an architecture\u0027s salient optimizing features. We show that for a set of DSP benchmarks and two full applications, hand-optimized performance can be predicted reliably. We applied this scheme to two different processors.
Year
DOI
Venue
2000
10.1145/368434.368766
design automation conference
Keywords
Field
DocType
dsp architecture selection,retargetable estimation scheme,design optimization,digital signal processor,digital signal processors,high level language,high level synthesis,embedded system,application software,computer architecture,digital signal processing
Digital signal processing,Architecture,Computer architecture,Parameterized complexity,Digital signal processor,Computer science,High-level synthesis,Dsp architecture,Retargeting,Electronic engineering,Real-time computing,Salient
Conference
ISBN
Citations 
PageRank 
0-7803-5974-7
10
0.75
References 
Authors
7
3
Name
Order
Citations
PageRank
Naji Ghazal1141.33
Richard Newton2989.57
Jan M. Rabaey347961049.96