Abstract | ||
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Dynamically reconfigurable architectures offer the opportunity to migrate software into hardware functional units at runtime. Architectures derived from the AMIDAR model exhibit such possibilities. Yet, the question has to be answered, which parts of the running application should be transformed into hardware. The migration of complete methods or procedures into hardware is often not feasible. In this contribution we show a hardware circuit that enables the processor to collect an execution profile of Java methods with a high resolution. We also show, how this profile information can be used to make reasonable choices for candidate instruction sequences. |
Year | DOI | Venue |
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2005 | 10.1109/IPDPS.2005.239 | IPDPS |
Keywords | Field | DocType |
amidar processors,execution profile,hardware functional unit,online profiling,complete method,high resolution,java method,amidar model exhibit,dynamically reconfigurable architecture,profile information,candidate instruction sequence,hardware circuit,functional unit,system on chip,circuits,instruction sets,embedded system,computer languages,computer architecture,java,embedded software,application software,hardware | Computer architecture,System on a chip,Embedded software,Hardware compatibility list,Instruction set,Computer science,Parallel computing,Hardware register,Hardware acceleration,Application software,Computer hardware,Hardware architecture | Conference |
ISBN | Citations | PageRank |
0-7695-2312-9 | 9 | 0.58 |
References | Authors | |
6 | 2 |
Name | Order | Citations | PageRank |
---|---|---|---|
Stephan Gatzka | 1 | 42 | 4.54 |
Christian Hochberger | 2 | 457 | 99.51 |