Title
Enhanced Reduced Pin-Count Test for Full-Scan Design
Abstract
This paper presents enhanced reduced pin-count test (E-RPCT) for low-cost test. E-RPCT is an extension of traditional RPCT for circuits in which a large number of digital IC pins is multiplexed for scan. The basic concept of E-RPCT is to provide access to the internal scan chains via an IEEE 1149.1 compatible boundary-scan architecture, instead of direct access via the IC pins. The boundary-scan chain performs serial/parallel conversion of test data. E-RPCT also provides I/O wrap to test non-contacted pins. The paper presents E-RPCT for full-scan design, as well as for full-scan core-based design.
Year
DOI
Venue
2002
10.1023/A:1014989408897
International Test Conference
Keywords
Field
DocType
pin-count test,low-cost test,enhanced reduced pin-count test,o wrap,direct access,extension oftraditional rpct,full-scan core-based design,large number ofdigital ic,ic pin,compatible boundary-scan architecture,basic conceptof,full-scan design,design for testability
Design for testing,Boundary scan,Computer science,Electronic engineering,Test data,Test compression,Computer hardware,Electronic circuit,Multiplexing,Embedded system
Journal
Volume
Issue
ISSN
18
2
1089-3539
ISBN
Citations 
PageRank 
0-7803-7171-2
27
1.45
References 
Authors
11
4
Name
Order
Citations
PageRank
Harald P. E. Vranken11207.70
Tom Waayers212811.47
Hérvé Fleury3271.45
David Lelouvier4271.45