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TOM WAAYERS
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Name
Affiliation
Papers
TOM WAAYERS
NXP Semicond, Eindhoven, Netherlands
12
Collaborators
Citations
PageRank
27
128
11.47
Referers
Referees
References
216
181
85
Search Limit
100
216
Publications (12 rows)
Collaborators (27 rows)
Referers (100 rows)
Referees (100 rows)
Title
Citations
PageRank
Year
Industrial Application of IEEE P1687 for an Automotive Product
8
0.65
2013
Clock control architecture and ATPG for reducing pattern count in SoC designs with multiple clock domains
2
0.40
2010
IEEE Std 1500 Compliant Infrastructure forModular SOC Testing
3
0.40
2005
Infrastructure for modular SOC testing
9
0.64
2004
Extending the Digital Core-based Test Methodology to Support Mixed-Signal
2
0.45
2004
An extension to JTAG for at-speed debug on a system.
4
0.52
2003
Multi-TAP Controller Architecture for Digital System Chips
1
0.52
2003
Enhanced Reduced Pin-Count Test for Full-Scan Design
27
1.45
2002
IEEE 1149.1-compliant access architecture for multiple core debug on digital system chips
18
2.16
2002
Core-based scan architecture for silicon debug
52
3.54
2002
Enhanced Reduced Pin-Count Test For Full-Scan Design
1
0.36
2001
A P1500 Compliant Programable BistShell for Embedded Memories
1
0.37
2001
1