Paper Info
Title
Compiler support for concurrency synchronization
Abstract
How to write a parallel program is a critical issue for Chip multi-processors (CMPs). To overcome the communication and synchronization obstacles of CMPs, transactional memory (TM) has been proposed as an alternative for controlling concurrency mechanism. Unfortunately, TM has led to seven performance pathologies: DuelingUpgrades, FutileStall, StarvingWriter, StarvingElder, SerializedCommit, RestartConvoy, and FriendlyFire. Such pathologies degrade performance during the interaction between workload and system. Although this performance issue can be solved by hardware, the software solution remains elusive. This paper proposes a priority scheduling algorithm to remedy these performance pathologies. By contrast, the proposed approach can not only solve this issue, but also achieve higher performance than hardware transactional memory (HTM) systems on some benchmarks.
Year
DOI
Venue
2011
10.1007/978-3-642-24650-0_9
ICA3PP
Keywords
Field
DocType
hardware transactional memory,transactional memory,higher performance,performance issue,pathologies degrade performance,concurrency mechanism,performance pathology,concurrency synchronization,critical issue,compiler support,chip multi-processors
Synchronization,Workload,Computer science,Concurrency,Parallel computing,Transactional memory,Chip,Compiler,Software,Priority scheduling,Distributed computing
Conference
Volume
ISSN
Citations 
7916
0302-9743
0
PageRank 
References 
Authors
0.34
10
4
Name
Order
Citations
PageRank
Tzong-yen Lin1111.86
Cheng-Yu Lee2656.70
Chia-Jung Chen34948.26
Rong-Guey Chang49914.70