Name
Abstract | ||
|---|---|---|
Aggressive technology scaling will push us into a 50nm regime within a decade. Most entries in current ITRS for the technology node are painted out in red, indicating "No know solutions". In the physical implementation domain, we are facing severe challenges in various aspects such as interconnect performance degradation, signal integrity, reliability, manufacturing variability, etc. These challenges will continue to grow for the future. In this panel, our panelists will present their own view of the most difficult challenges in the 50nm regime, and possible solutions to break through the red brick wall as well, followed by a live discussion on the approaches we should take for successful 50nm physical implementation. |
Year | DOI | Venue |
|---|---|---|
2001 | 10.1145/370155.370344 | ASP-DAC |
Keywords | Field | DocType |
own view,physical design,aggressive technology scaling,performance degradation,live discussion,difficult challenge,current itrs,red brick wall,physical implementation,physical implementation domain,technology node,signal integrity | Manufacturing variability,Telecommunications,Technology scaling,Computer science,Electronic engineering,Architectural engineering,Physical design,Brick,Time constraint | Conference |
ISBN | Citations | PageRank |
0-7803-6634-4 | 0 | 0.34 |
References | Authors | |
0 | 7 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Hidetoshi Onodera | 1 | 455 | 105.29 |
| Andrew B. Kahng | 2 | 7582 | 859.06 |
| Wayne W.-M. Dai | 3 | 29 | 6.69 |
| Sani R. Nassif | 4 | 2268 | 247.45 |
| Juho Kim | 5 | 7 | 1.80 |
| Akira Tanabe | 6 | 33 | 4.59 |
| Toshihiro Hattori | 7 | 107 | 21.83 |