Title
Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor
Abstract
Dynamically Reconfigurable Processor (DRP) developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixteen circuit configurations, or contexts, to implement different logic on one single DRP chip. Several stream applications have been implemented on DRP-1, the first prototype chip, and evaluation results are presented. By computing parallelly using the Processing Elements(PEs) and distributed memory modules, DRP-1 out-performed Pentium III/4 and embedded CPU MIPS64 in some stream application examples. We also present programming techniques applicable on reconfigurable processors and discuss their feasibility in boosting system performance.
Year
DOI
Venue
2004
10.1109/FCCM.2004.42
FCCM
Keywords
DocType
ISBN
drp-1 out-performed pentium iii,prototype chip,stream applications,dynamically reconfigurable processor,reconfigurable processor,stream application,nec electronics,processing elements,coarse grain reconfigurable processor,single drp chip,stream application example,system on a chip,chip,register file,distributed memory,stream processing,application software,embedded computing,state transition,frequency,prototypes,national electric code,fast fourier transforms,computer science
Conference
0-7695-2230-0
Citations 
PageRank 
References 
15
0.97
1
Authors
13
Name
Order
Citations
PageRank
Noriaki Suzuki1411.83
Shunsuke Kurotaki2161.36
Masayasu Suzuki310613.17
Naoto Kaneko4171.78
Yutaka Yamada5150.97
Katsuaki Deguchi6333.21
Yohei Hasegawa710312.78
Hideharu Amano81375210.21
Kenichiro Anjo9616.68
Masato Motomura109127.81
Kazutoshi Wakabayashi1121923.60
Takeo Toi12150.97
Toru Awashima13474.80