Title
DTMOS technique for low-voltage analog circuits
Abstract
In this paper, the application of dynamic threshold MOS (DTMOS) technique for low-voltage analog circuits is explored. The body terminal of PMOS transistors in bulk CMOS technology can be used as the forth terminal to enhance the performance of low-voltage analog circuits. To show the effectiveness of this technique, we have designed a continuous time common mode feedback (CMFB) circuit for a sub 1-V opamp and a new sub 1-V, 1-bit quantizer. A 0.8-V opamp with embedded CMFB and a 0.8-V, 1-bit quantizer for low-voltage ΔΣ modulators are implemented in 0.18- µm CMOS technology. The simulation results as well as the measurement data of these blocks are presented in this paper.
Year
DOI
Venue
2006
10.1109/TVLSI.2006.884174
IEEE Trans. VLSI Syst.
Keywords
DocType
Volume
embedded cmfb,1-bit quantizer,bulk cmos technology,new sub 1-v,low-voltage analog circuit,body terminal,1-v opamp,common mode feedback,dtmos technique,pmos transistor,m cmos technology,operational amplifier,comparator,low voltage,common mode,opamp,operational amplifiers,delta sigma modulation,analog circuits,low power electronics
Journal
14
Issue
ISSN
Citations 
10
1063-8210
2
PageRank 
References 
Authors
0.62
1
2
Name
Order
Citations
PageRank
Mohammad Maymandi-Nejad18513.20
Manoj Sachdev266988.45