Name
Title | ||
|---|---|---|
Fully-Automated and Portable Design Methodology for Optimal Sizing of Energy-Efficient CMOS Voltage Rectifiers |
Abstract | ||
|---|---|---|
This paper presents a specific, fully-automated and portable design methodology used to optimize implementations of AC-DC rectifiers using MOS diodes. Output voltage and efficiency are theoretically analyzed taking into account influences of devices DC and AC characteristics, input signal voltages and frequencies as well as load currents, temperatures, backgate voltages and even capacitors and diodes parasitic capacitances. An experimental voltage multiplier is designed in a 1 μm multiple-threshold voltage SOI CMOS technology for ultra low power applications at 13.56 MHz . |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/JETCAS.2011.2158357 | IEEE J. Emerg. Sel. Topics Circuits Syst. |
Keywords | DocType | Volume |
cmos integrated circuits,multiple-threshold voltage soi cmos technology,sensor network,energy scavenging,size 1 mum,backgate voltages,voltage multiplier,semiconductor diodes,energy conservation,frequency 13.56 mhz,low-power electronics,rectifier,fully-automated design methodology,solid-state rectifiers,mos diodes,silicon-on-insulator,load currents,ultralow power applications,portable design methodology,radio frequency identification (rfid),energy-efficient cmos voltage rectifiers,integrated circuit design,ac-dc power convertors,design methodology,ac–dc converter,ac-dc rectifiers,parasitic capacitances,energy efficient,low power electronics,schottky diodes,mathematical model,radio frequency identification,schottky diode,capacitance,threshold voltage,capacitors,silicon on insulator | Journal | 1 |
Issue | ISSN | Citations |
2 | 2156-3357 | 4 |
PageRank | References | Authors |
1.16 | 6 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Geoffroy Gosset | 1 | 5 | 1.91 |
| Denis Flandre | 2 | 316 | 70.47 |