Name
Title | ||
|---|---|---|
Over-10×-extended-lifetime 76%-reduced-error solid-state drives (SSDs) with error-prediction LDPC architecture and error-recovery scheme. |
Year | DOI | Venue |
|---|---|---|
2012 | 10.1109/ISSCC.2012.6177074 | ISSCC |
Keywords | Field | DocType |
low density parity check,bit error rate,error rate,error correction code,reliability,nonvolatile memory,couplings | Architecture,Coupling,Flash memory,Low-density parity-check code,Computer science,Word error rate,Electronic engineering,Non-volatile memory,Solid-state,Bit error rate | Conference |
Citations | PageRank | References |
25 | 2.91 | 1 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Shuhei Tanakamaru | 1 | 121 | 18.35 |
| Yuki Yanagihara | 2 | 47 | 4.70 |
| Ken Takeuchi | 3 | 88 | 43.27 |